Besides clockspeed, there is another key to higher performance: more instructions per clockcycle. Unfortunately the number of x86 instructions you can issue per clockcycle is limited. For example, you may encounter a branch (an "IF" clause) or an instruction that needs the result of a previous one.
IA 64, Intel's new instruction set has a solution for those problems, based on the principles of the EPIC design philosophy.
The philosophy of EPIC is simple: let the compiler decide which instructions can be executed together, put them together in bundles, and execute these instruction bundles. Further more, EPIC uses the best techniques found in modern (RISC) processors: speculative load, predication, fixed length instructions, and last but not least 128 registers for both Integer and FP operations. And of course that awkward floating point stack is gone. The Itanium (alias Merced), Intel's first IA-64 CPU, should have the highest FPU power available on earth (when running IA-64), clock for clock about 2 to 3 times stronger than the Athlon.
IA 64 CPU's hold big promise. While the Itanium will be able to crunch two bundles of a maximum of 3 instructions at the time, successor "McKinley" will be capable of twice as much. IA-64 CPUs will be extremely efficient chips, which can process more instructions per clockcycle than any other CPU.
That doesn't mean there are no concerns. The quality of compilers will make or break the success of IA 64. And writing efficient compilers is more than a science. It is an art. It takes years to refine a compiler for a new instruction set.
The biggest disadvantage of the IA-64 CPU is their lackluster IA-32 (=32-bit x86) performance. It is clear that Windows 2000 64-bit and its later siblings will not be fully 64-bit, but more like 64/32-bit. This will severely hamper the performance of IA-64 CPU's like the Itanium.
When IA-64 CPU's have to run "old" 32-bit x86 programs, they first have to switch to IA-32 mode. That will most likely cost quite a few cycles. In IA-32 mode, IA-32 instructions are translated to IA-64 instructions by "IA-32 to IA-64" decoders. All this switching and translating slows the CPU down. Both the Athlon and Intel's own Willamette are expected to beat the Itanium by quite a margin, when running non-64-bit programs. IA-64 programs will be rare for quite some time, limiting the Itanium to some specific niche markets.