There are several operations that must occur inside a memory chip to store and retrieve the data. Some of these operations may occur simultaneously, while others are dependent upon the completion of a previous operation. Each of these operations takes a finite time to complete in nanoseconds.

The amount of time required to complete one operation before another can begin is called the 'latency' period. Though it is probably most often seen in the term CAS Latency, there are also other situations where the term is used. Keep in mind that latency is a general term that indicates the required delay before an action can begin, rather than the description of a specific operation.

Manufacturers publish data sheets for all of their parts that indicate the amount of time required for all operations, and will almost always include a 'wave form' timing chart to help show their relationships. Note that if the chip has more than one method of reading or writing data, there will be a chart for each method. Which chart(s) applies to a particular module depends upon which method(s) the module designer implemented and which operation is being performed.