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Sharky Extreme : July 20, 2008





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All Celerons still utilize a 66MHz front side bus speed and the new 466 is no different. This is one of the ways that Intel keeps the Celeron line separate (inferior really) from the speedy perception of their high-end 100MHz FSB CPU models. In reality, since so little software has been designed to press system DRAM through massive texture swaps being performed via AGP, the jump from 66 to 100MHz hasn't shown a tangible benefit to end users since its introduction in April of 98. Sooner or later we'll see entertainment titles that virtually require an AGP 4X spec PC, along with support for the optimized floating point instructions of Intel's P3-only (at the moment) SSE instruction set.

At that time (roughly a year from today) the differences in performance between the slower 66MHz FSB based products and the faster 100 and 133MHz FSB speeds of high-end Intel parts will manifest themselves.

For now the differences are a moot point, as our performance testing results of the Celeron 466 and the Intel P3-500 indicate when compared against each other. SSE will play an important part in performance sooner than any FSB increases will however, the upcoming E3 exposition in Los Angeles will give us a better idea as to exactly how much impact the P3's SSE instruction set will have. (We'll be catching up with the actual programmers in the trenches and reporting on their feedback regarding the new performance levels offered by the inclusion in their products of SSE support.)






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